1. Field of the Invention
The present invention generally relates to a liquid crystal display device. More particularly, this invention relates to an exposure apparatus and method for forming a thin film transistor.
2. Description of the Related Art
Generally, liquid crystal display (LCD) devices have been widely used in displays such as television, computer monitors, and so forth. Among LCD devices, remarkable research and development has taken place for the so-called active matrix LCD (AMLCD). The AMLCD is characterized by high speed response, has the potential to accommodate a large number of pixels, and is anticipated to accomplish high display quality, large screen size, and a color screen.
According to the conventional AMLCD device, a gate line and a drain line are formed on a transparent insulating substrate, and a switching element and a pixel electrode are arrayed and designed at the cross point of the gate line and drain line.
Since operation of the pixel electrode is independently controlled by a switching element such as a diode or a thin film transistor, it is possible to operate the pixel electrode with high speed, to increase the number of pixel per unit area, or to increase the screen size.
In the above mentioned AMLCD device, a thin film transistor is mainly used as the switching element.
FIGS. 2A-2C are simplified cross-sectional views illustrating a method for forming a thin film transistor according to the conventional art.
Referring to FIG. 2A, a gate electrode 2 of an opaque metal layer is formed on a transparent insulating substrate 1. The transparent insulating substrate used herein is a glass substrate. A gate oxide layer 3 of silicon nitride or metal oxide is formed on the transparent insulating substrate 1. A first semiconductor layer 4 is formed on a selected portion of the gate oxide layer 3, the first semiconductor layer 4 being made of amorphous silicon and acting as a channel in the thin film transistor.
Referring to FIG. 2B, an insulating layer 5 acting as an etch stopper (hereinafter referred to as "etch stopper layer") is formed on the glass substrate where the first semiconductor layer 4 has been formed. The etch stopper layer 5 is made of silicon nitride having a property capable of absorbing moisture component, and has a lower etch rate than the first semiconductor layer 4. A photoresist film 6 is coated on the etch stopper layer 5 using a conventional method. Afterwards, a selected portion of the photoresist film 6 is exposed to light from the back side of the substrate 1. At this time, the light projected from a light source 100 is homogenized in its intensity by being reflected at first and second reflecting plates 101 and 102. The homogenized light is incident from the back side of the substrate 1 to the photoresist film 6 wherein opaque gate electrode 2 is used as a mask resulting in the formation of exposed portion 61 and 62.
FIG. 2C, the exposed portions 61 and 62 in the coated photoresist film 6 are removed using a general developing solution, resulting in the formation of a photoresist pattern 6A.
Thereafter, an etch stopper layer 5A is formed by patterning the etch stopper layer 5 using the photoresist pattern 6A, as shown in FIG. 2D. Afterwards, the photoresist pattern 6A is removed by a conventional plasma ashing step. Thereafter, n-typed impurity-doped amorphous silicon layer 7 and a metal layer 8 for source and drain electrodes are formed on the structure resulting from the above steps, in that order.
Referring to FIG. 2E, n-type impurity-doped amorphous silicon layer 7 and the metal layer 8 for source and drain electrodes are patterned such that their central portion is exposed, thereby forming ohmic contact layers 7A and 7B, source electrode 8A, and drain electrode 8B.
The etch stopper layer 5A used in the conventional thin film transistor is formed to decrease the number of masks using the back side exposure. When the back side exposure process is used, parallel plate light is incident to the glass substrate as shown in FIG. 2B, whereby the first semiconductor layer 4 has a wider extent than the gate electrode 2 and absorbs 90% or more of the incident light in the areas extending beyond the edges of the gate electrode. Thus, a sufficient amount of light does not come to be incident to the photoresist film 6 in those areas wherein the first semiconductor layer 4 inadvertently acts as a mask so that the shape of the formed etch stopper layer 5A is not entirely determined by the gate electrode 2 but also to some extent by the first semiconductor layer 4. In other words, the formed etch stopper layer 5A has a wider width than the gate electrode 2.
At this time, the width of the etch stopper layer 5A defines a channel length in the thin film transistor. Because of the above mentioned reasons, the increase in the channel length increases with the width of the etch stopper layer 5A. With increasing the channel length, signal delay time in the thin film transistor also increases. With the increase in the delay time, a residual image is axgenerated in the screen of LCD device, whereby display quality is lowered.
Moreover, even though the incident light is homogenized by the reflective plates, it is difficult for the incident light to maintain the same intensity, so that the light that approaches the photoresist film weakens in intensity. Thus, it is difficult for the photoresist film to be patterned to a desired shape. As a result, the shape of the etch stopper layer is deformed.